Circuit Representation of an Algorithm

I am trying to implement the idea found in this paper:

http://crypto.stanford.edu/craig/easy-fhe.pdf.

However, I do not know how开发者_运维问答 the compute the circuit representation of an algorithm.

Suppose I have a function that takes a list of exactly 32, 32 bit signed integers, and returns a 64 bit signed integer representing the sum of the integers. How can I convert this function to a Boolean function? That is, I need to design a circuit where each output wire is a boolean function of the ands/ ors/ and nots of the 1024 input wires.

Notice that the function will take a fixed width input and produce a fixed width output.

Are there any techniques from electrical engineering or math that I can use?

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Consider the logic in an FPGA. I think this will help you get an idea of the kind of circuit needed to sum exactly 32 32-bit inputs into a 64-bit output.