cisc versus risc

If you were writing a a textbook, and you needed to decide on a CPU design to talk about certain issues, would you choose RISC or CISC? Pros 开发者_开发技巧for RISC, well, you know: cleaner, easier, and so on. Cons for RISC: I would have to use an emulator, few CPUs in market, compared to x86 , and therefore less impact than if I chose a pure RISC CPU like ARM or SPARC. I'm torn, though I am leaning towards x86 and CISC... many pros, cons: not RISC, and all those books like Henessy et al. and others love RISC! So, in summary: would you choose RISC or CISC (x86)? Thanks.

---

Are you talking specifically about x86 processor design, or a specific design feature which is more prevalent in x86 than anything else? No? Then go with a RISC architecture.

All that using x86 will achieve is that the x86 mechanics will obscure whatever point it is you're actually trying to make.

---

Fory general (or programmer) audiences I would suggest x86. No matter what language they are familiar with, the same building blocks like for and if, or the concept of functions can be easily demonstrated with x86 instructions.

Asm is abstract enough, it is priceless if they can connect the new knowledge to their existing understanding of programming. (It may even help them write better quality code).

I don't think choosing x86 means that you have to include all the instructions. The next level can be that you intoduce the machine code representation of some ASM structures, but only when they are confortable with their mnemonics first.

---

I prefer RISC, because they have fast and small instructions. They're cheaper than CISCs ones and have many more registers. And some instructions of CISC processors, for example intel's xchg or scas, stos, movs and cmps used with rep are so particular than many compilers never use them, so having them is only a waste of silicon and money.
And, talking about registers, even if RISC processors need more instructions to accomplish what a CISC would do with only one, they have so many registers that (I think) memory is accessed less frequently on a RISC. I'm talking as a CISC "programmer", since I learned on the intel's x86 and sometimes having only 6 general purpose registers available, which are often reduced to 3 or 4 in loops (ecx is gone, with either edi or esi or both), can be very tricky. Although assembly itself tends to hide the true nature of the code, I think (remember I grew with the x86) that the RISC assembly is more difficult to understand due to the larger amount of instruction needed.

---

If the main requirement for a project is security, not capacity since security often is a tradeoff for capacity, then I propose that the RISC architecture is used. A firewall that for instance uses x86 assembler was known to have a security issue that RISC implementation like SPARC assembler didn't. So the spec for the most secure project could be to use SPARC assembly since it is known to be a secure environment and even if it wasn't known to be a secure environment there are so few people who can program SPARC assembly compared to x86 assembly so the number of attackers who could program a security breach would be less if what a Firewall is running is a RISC architecture.

So I say that if you are talking about a firewall application, then probably it should be a RISC architecture.