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Linux kernel module compiling

开发者 https://www.devze.com 2023-01-22 14:26 出处:网络
I try to compile simple linux kernel module: #include <linux/module.h> #include <linux/kernel.h>

I try to compile simple linux kernel module:

#include <linux/module.h>    
#include <linux/kernel.h>       

int init_module(void)
{
        printk("Hello world 1.\n");
        return 0;
}

void cleanup_module(void)
{
        printk(KERN_ALERT "Goodbye world 1.\n");
}

My makefile:

obj-m = testmodule.o
KVERSION = $(shell uname -r)
all:
        make开发者_C百科 -C /lib/modules/$(KVERSION)/build M=$(PWD) modules
clean:
        make -C /lib/modules/$(KVERSION)/build M=$(PWD) clean

Now i haven't errors in my .c file.

But when i try make in terminal: make: Nothing to be done for `all'.

What's wrong?

Thank you.


The default command in your makefile is

make -C /lib/modules/$(KVERSION)/build M=$(PWD) modules

That instructs make to cd to /lib/modules/$(KVERSION)/build and run

make module m=YOUR_CURRENT_DIR

In turn, that makefile is not finding anything to do. Presumably, that makefile expects to find some particular structure in your current directory.

You need to more carefully read whatever instructions led you to set up this makefile.


You really don't give enough information to determine the correct answer, but I'll give you some things to look into.

How are you compiling it? Do you have the correct include path in your build? Build paths are specified with the -I option to gcc. Make sure you are pointing to your kernel source tree.

Have you build the kernel? When you do a make, certain things are setup that allows you to build. Doing a make doesn't build everything (like modules) but will get the initial stuff setup for you.


Make sure your have your distributions the kernel header/development packages installed that provide these include files.

If they are installed, search where these include files are located on your computer and add these directories to your compilers include search path (the -I option).


This is because your Makefile contains no tab before giving make command

make -C /lib/modules/$(KVERSION)/build M=$(PWD) modules

So normally your file should be like below:

obj-m = test.o                                                                   

KVERSION = $(shell uname -r)                                                     

all:                                                                             
        make -C /lib/modules/$(KVERSION)/build M=$(PWD) modules                  
clean:                                                                           
        make -C /lib/modules/$(KVERSION)/build M=$(PWD) clean  
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