C_DEFINES=$(C_DEFINES) -D_PRODUCT_A
//C_DEFINES=$(C_DEFINES) -D_PRODUCT_B
#ifdef PRODUCT_A // <- I want to d开发者_StackOverflowo doing like this in a sources file.
MOST_SOURCES= a.c b.c productA.c
#elif PRODUCT_B
MOST_SOURCES= a.c b.c productB.c
#endif
Is there a proper syntax?
This doesn't work, because nmake (build?) only uses the first SOURCES line in the file
!IFDEF NEW_SRC
SOURCES=src1.c src2.c src3.c
!ELSE
SOURCRS=src3.c src4.c src5.c
!ENDIF
But, you can include environment variables like :
SOURCES=\
purecall.c \
driver_base.cpp \
capture.cpp \
device.cpp \
$(_rc_filename)
or you do something like :
makefile.inc
--------------
!IFDEF NEW_SRC
MY_SRC=src1.c src2.c src3.c
!ELSE
MY_SRC=src3.c src4.c src5.c
!ENDIF
!IF [echo SOURCES=$(MY_SRC) > sources.inc]
!ENDIF
sources
--------
NTTARGETFILE0=
TARGETNAME=mylib
TARGETTYPE=LIBRARY
.
.
.
!include sources.inc
mybuild.bat
-------------
build -Z0
build -Zcef
(This is taken from the OSR online mailing list )
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