开发者

Bitbanging a PIO on Coldfire/ucLinux

开发者 https://www.devze.com 2022-12-24 10:06 出处:网络
Here\'s the problem: I need to program some hardware via 2 pins of the PIO (1 clock, 1 data). Timing constraints are tight - 10ms clock cycle time. All this, of course, whilst I maintain very high lev

Here's the problem: I need to program some hardware via 2 pins of the PIO (1 clock, 1 data). Timing constraints are tight - 10ms clock cycle time. All this, of course, whilst I maintain very high level services (CAN bus, TCP/IP). The downstream unit also ACKS by asserting a PIO pin, configured as an input, high. So this loop has to both read and write. I need to send 16 bits in the serial stream.

Is there an established way to do this sort of thing or should I simply get the hardware guys to add a PIC or somesuch.

I'd much prefer to avoid exotics like RTAI extensions at this stage. I did once see a reference to user-mode IO which implied a possible interrupt driven driver but lost track of it.

Any pointers 开发者_StackOverflow中文版welcomed.


The easiest way, in my experience, is to write a kernel driver. Provided, of course, that one doesn't already exist -- 1 clock, 1 data sounds i2c-like (though 10ms cycle sounds much slower than i2c), and there are bit-banging i2c drivers for Coldfire already in existence. Even if it's not i2c, you might find i2c-adap-mcf_gpio of use as a starting point.

You're actually lucky in that it's a 10ms cycle -- default kernel tick is 10ms (and it can be adjusted if necessary), so you should be able to use the appropriate kernel sleep functions.

(This all also depends on which kernel you're using. Easy user-mode I/O is available in 2.6 kernels fairly readily -- there are features in 2.4 kernels, but they may require more work.)

0

精彩评论

暂无评论...
验证码 换一张
取 消