FPGA TCP implementation [closed]

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Does anybody know of an implementation of TCP on a FPGA WITHOUT using any sort of microblaze? Preferably open source, because it is for an university/research project.

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Depending on what you want you maybe can get away with a relative small own implentation (e.g. for packet inspection). The statefulness of TCP makes an full hardware implementation vary big and cumbersome. If possible I would recommend to switch to UDP, that makes it much easier.

As project dealing with all the IP stuff I know NetFPGA, but I never checked their design, so it could be, that they utilize internal a microblaze for some stuff, but my guess would be not.

EDIT: I also remember, that I met one someone from the University of Copenhagen (not sure about this point) at a conference, who also implemented TCP stack on Xilinx FPGAs.

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I know Easics has a TCP core. You can find a presentation on it here

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As far as I know both Intelop and Velocytech have commercial TCP/IP cores available

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A full and low latency TCP/IP Hardware Stack is also available at PLDA