In Sun make, I can create a rule resembling the following:
${OBJECTS} : ${@F:%.o=%.c}
(...) ${<}
... where ${@} in the dependency list is the same as ${@} in开发者_运维问答 the rule portion of the target. That way, ${<} always evaluates to the right source file for the object being built.
This is somewhat like doing rules of the form:
%.o : %.c
(...) ${<}
My question is: is there a way to do this with GNU make?
Yes.
%.o : %.c
(...) $<
Or if you want to restrict the rule to ${OBJECTS}
:
${OBJECTS} : %.o : %.c
(...) $<
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