Makefile if-statement not evaluating with export variables?

This is an offshoot to my other question.

Is there something special I have to do in order to make this work with export variables?

So I'm running this off of a Makefile that includes a master Makefile in another location. In this local Makefile, I have:

include /path/to/master/Makefile/
export TOOL = A

Now in my Master Makefile I have:

ifeq ( $(TOOL), A )
    echo "Tool A will be run..."
    [syntax for toolA]
else
    echo "Tool B will be run..."
    [syntax for toolB]
endif

But when I run gmake, toolB is always run! I checked the variable $(TOOL) and it shows A. What am I doing wrong?

Thanks!!

EDIT: Adding Makefile example.

For my problem, moving the include to after the export fixed my problem. But this is an existing Makefile, and having the include at the very top has always worked!

The include statement is up top in the local, and all the exports at the bottom. Only my new export line fails. Does anyone know why?

Local Makefile

export TOOL A
include /path/to/master/Makefile
export VERSION IMP-IR5

Master Makefile

export VERSION IAP-100

ci:
ifeq ( $(TOOL), A )
    echo "Tool A will be run..."
    [syntax for toolA]
    echo $(VERSI开发者_C百科ON)
else
    echo "Tool B will be run..."
    [syntax for toolB]
    echo $(VERSION)
endif

Output

echo "Tool A will be run..."
Tool A will be run...
echo IMP-IR5
IMP-IR5

But if I switch the top to lines in the local Makefile (like it was originally):

include /path/to/master/Makefile
export TOOL A
export VERSION IMP-IR5

I get:

echo "Tool B will be run..."
Tool B will be run...
echo IMP-IR5
IMP-IR5

Why does IMP-IR5 go through but not tool A? So confused...

---

Try moving your export TOOL = A line above the include statement in your local Makefile. Also change ifeq ( $(TOOL), A ) to ifeq ($(TOOL),A).

---

Put the variable definition before the include statement:

export TOOL = A
include /path/to/master/Makefile/

otherwise the rule in the included Makefile won't see it.

Also, be careful of whitespace in your conditional:

ifeq ($(TOOL),A)

EDIT:

Easy! You are using the two variables differently. Make evaluates the makefile from top to bottom, decides which targets to rebuild before rebuilding any of them, then executes the rules, using whatever values the variables have acquired. Consider this makefile:

# I've added '@' to make it quieter.
ci:
ifeq ( $(TOOL), A )
    @echo "Tool A will be run..."
    @echo $(VERSION)
else
    @echo "Tool B will be run..."
    @echo $(VERSION)
endif

# (Never mind the "export". You aren't calling $(MAKE),
# you're just including a makefile.)
TOOL = A
VERSION = IMP-IR5

Make gets to the if line, TOOL has not yet been defined so it evaluates to nothing, so the makefile reads as:

ci:
    @echo "Tool B will be run..."
    @echo $(VERSION)

TOOL = A
VERSION = IMP-IR5

Mow Make has determined that it will execute the ci rule, with TOOL = A (too late) and VERSION = IMP-IR5. Thus:

Tool B will be run...
IMP-IR5