Few basic doubts regarding caches

Please bear with me , these questions may be very basic . I am just trying to understand the fundamentals.

1. Are th开发者_C百科e cache eviction algorithms such as LRU are implemented by the OS ?? if so , how can we find out the current algorithm being used and is it possible for the programer to change it ?

2. Since cache is along with processor , the read and write policies are hardcoded or the operating system decides it ?

3. Are there separate caches for data and instructions ? or do they share the same cache ?

4. What are the algorithms currently employed in operating systems to solve cache coherency problem ?

Thanks for your patience in answering my questions.

• Sethu

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In general, the cache policy is dictated by hardware. There are typically separate data and instruction caches, as well as a translation lookaside buffer (TLB) cache. The OS has no direct control of cache, but it may make decisions in virtual-memory mappings to optimise cache usage.

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Just one answer? Well

1.) No hardware implemented. They should be documented by the vendor, if not then microbenchmarking is an option.

2.) Hardware

3.) As pointed out above L1 cache has separate caches for data and instruction. There is also TLB for virtual memory.

4.) I attended a course last semester which covers these topics. The slides are available online: http://www.systems.ethz.ch/education/past-courses/hs09/mmdbms