Make: multiple $ signs

From section 4.14 Generating Prerequisites Automatically of GNU make manual

 %.d: %.c
         @set -e; rm -f $@; \
          $(CC) -M $(CPPFLAGS) $< > $@.$$$$; \
          sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \
          rm -f $@.$$$$

What does $$$$ mean?

开发者_运维技巧

Also, in a book I am reading there a recipe in a make file:

    $(AWK) '...                       \
      {                               \
       print "Killing " $$3;          \
       system( "$(KILL) -f " $$1 )    \
      }'

The whole thing is quoted since it is a awk program. I replaced the rest of the recipe with ... Why does it use $$, and not $?

Any hints are appreciated. Thanks.

---

$ has meaning to both the shell and make, and awk. If you want non-make semantics, you have to double to avoid the make semantics.

The second example is thus easy: It's just awk-semantics for the $1 and $3.

The first one is shell semantics for $$. $$ is:

$$
Process ID (PID) of the script itself. [5] The $$ variable often finds use in scripts to
construct "unique" temp file names (see Example 31-6, Example 16-31, 
and Example 15-27). This is usually simpler than invoking mktemp.

to grab a quick quote.