I already know that a PCI-E has lanes( which depend on x1, x4, etc... ) which consist of 2 wires. One wire receives while the other transmits. Each wire can transfer 1-bit each cycle simultaneously. However, the lane is a full-dupl开发者_开发技巧ex system.
I need clarification from you guys. Is this information correct?
Each lane built from Rx and Tx directions. Each direction has a differential pair which means 4 wires for each lane.
Each Rx\Tx lane can transfer 1bit each cycle.
精彩评论