How to declare an array of 4 bits in Verilog

I need an array to hold a 4-bit number. I开发者_开发知识库t is neither an input or an output, just an intermediary value necessary for calculations. How would this be declared?

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You mean that you need a variable?

reg [3:0] mynumber;

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For synthesis, you would use either a register or a wire, depending on what you needed it for.

reg  [3:0] my_reg;

or

wire [3:0] my_wire;

If you will use this value in an always block, you need to declare it as a reg.

If you are using it for combinational logic, not inside an always block, you would declare it as a wire. This would be used with an assign statements or in a port list.