I'm lookin开发者_运维问答g for a good explanation why (not how, I know that) binary subtraction is always (?) done by adding the complement etc. Is it just because of the extra logic gates that would be necessary or are there additional, more sophisticated reasons? For example, I could understand that it would be problematic if the result is negative - the representation might have to change. Can you think of more reasons?
Consider an 8-bit adder. There are 2 sets 8 signals coming in, along with a carry bit. You could build 2 almost identical circuits, then include a multiplexor to select which result to store in the result register. Or you could add a single row of XOR gates in the path of one operand. You get the complement by XORing with 1. You also feed that "1" into the carry input of the adder since X-Y = X + ~Y +1. You now have one slightly larger circuit that can do two operations instead of a bunch more circuits. You can also feed a 0 into one argument and use the XOR gates to implement NOT. The adder can also be slightly modified to perform other operations - like XOR on the two operands - with very little circuitry. This all goes back to the small scale integration days when gates were to be minimized. There has been no reason to do it any other way since. See the following for the circuit diagram of a 74181 4-bit ALU that can do a bunch of operations: 74181 description
easier to decompose subtraction into two operations on the assembly level than to add extra functionality to the processor circuitry. in essence you'd just be adding the same thing you already had except this would be a single operation, if you leave it as addition of the complement then you can reuse addition and the complement circuits instead of wasting space on the processor to add what you already have
You already hit the nail on the head, it's all about space on the die. Why bog down the ALU with more circuitry? That's space that could be used for logic, or a smaller ALU and some more memory.
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