Why is x86 little endian?_问答_开发者_运维开发者技术经验分享

A real question that I've been asking myself la开发者_运维百科tely is what design choices brought about x86 being a little endian architecture instead of a big endian architecture?

Largely, for the same reason you start at the least significant digit (the right end) when you add—because carries propagate toward the more significant digits. Putting the least significant byte first allows the processor to get started on the add after having read only the first byte of an offset.

After you've done enough assembly coding and debugging you may come to the conclusion that it's not little endian that's the strange choice—it's odd that we humans use big endian.

This is quite archeological, but it most likely was not Intel's choice. Intel designed processors with backward compatibility a primary concern, making it easy to mechanically translate assembly code from the old to the new architecture. That turns the clock back from 8086 down to 8080 to the first micro-processor where endianness mattered, the Intel 8008.

That processor was started when CTC (later named DataPoint) came to Intel to ask for help with their data terminal product. Originally designed by Victor Poor and Harry Pyle, it had a logical processor design in MSI (many chips). They asked Intel to provide them with a storage solution, using 512 bit shift registers.

That was not Intel's favorite product, they took on these kind of custom design jobs to survive the ramp-up time for their 1024 bit RAM chip. Tedd Hoff, Stan Mazor and Larry Potter looked at the design and proposed an LSI processor with RAM.instead. That eventually became the 8008. Poor and Pyle are credited with designing the instruction set.

That they chose little-endian is credible from this interview with Poor. It skips through it rather quickly and the interview is rather scatter-shot but the relevant part on page 24:

Shustek: So, for example, storing numbers least significant byte first, came from the fact that this was serial and you needed to process the low bits first.
Poor: You had to do it that way. You had no choice.

The "had no choice" remark is odd, that appears to only apply to the bit-serial design of the MSI processor. Also the reason they shopped for shift registers instead of RAM. It comes up again at page 34:

Hendrie: Do you remember any of the push backs from them about the design or any of those details...
Poor: One of them was the one bit versus 8-bit. They wanted an 8-bit wide part and, ultimately, that's how they built it.
Poor: But it was still recirculating. But, you see, there are interesting points whether there's going to be a big end or a little end part could have been changed at that point but we didn't. We just left it...
Hendrie: Even after you went to eight bits?
Poor: Right. Which is why the Intel product line is that way today

Stan Mazor of Intel, who worked on the designs 4004 and 8008, elaborates on the "push back" in Oral History Panel on Intel 8008 Microprocessor:

And lastly, the original design for Datapoint... what they wanted was a [bit] serial machine. And if you think about a serial machine, you have to process all the addresses and data one-bit at a time, and the rational way to do that is: low-bit to high-bit because that’s the way that carry would propagate. So it means that [in] the jump instruction itself, the way the 14-bit address would be put in a serial machine is bit-backwards, as you look at it, because that’s the way you’d want to process it. Well, we were gonna built a byte-parallel machine, not bit-serial and our compromise (in the spirit of the customer and just for him), we put the bytes in backwards. We put the low- byte [first] and then the high-byte. This has since been dubbed “Little Endian” format and it’s sort of contrary to what you’d think would be natural. Well, we did it for Datapoint. As you’ll see, they never did use the [8008] chip and so it was in some sense “a mistake”, but that [Little Endian format] has lived on to the 8080 and 8086 and [is] one of the marks of this family.

So, Intel wanted to build byte-parallel CPU with 8 separate pins for accesses to data bus. The reason why Intel insisted on the compromise is explained in "Intel Microprocessors: 8008 to 8086" by Stephen P. Morse et all:

This inverted storage, which was to haunt all processors evolved from 8008, was a result of compatibility with the Datapoint bit-serial processor, which processes addresses from low bit to high bit. This inverted storage did have a virtue in those early days when 256 by 8 memory chips were popular: it allowed all memory chips to select a byte and latch it for output while waiting for the six high-order bits which selected the chip. This speeded up memory accesses.

Ultimately CTC did not use the 8008, it was finished a year too late and they had already implemented the MSI processor by then. The micro-processor design was certainly CTC's intellectual property, they however traded the rights to it with Intel for the design cost. Bit of a mistake :) Law suits about patent rights followed later.

So, as told, Intel ended up with little-endian because of the way serial ports worked.

It reflects the difference between considering memory to always be organized a byte at a time versus considering it to be organized a unit at a time, where the size of the unit can vary (byte, word, dword, etc.)